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LPC1111FDH20/002 Datasheet(PDF) 35 Page - NXP Semiconductors

Part # LPC1111FDH20/002
Description  microcontroller
PDF  127 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC1111FDH20/002 Datasheet(HTML) 35 Page - NXP Semiconductors

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LPC111X
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 9.2 — 26 March 2014
35 of 127
NXP Semiconductors
LPC1110/11/12/13/14/15
32-bit ARM Cortex-M0 microcontroller
[1]
Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled (pins pulled up to 2.6 V for
LPC111x/101/201/301, pins pulled up to full VDD level on LPC111x/002/102/202/302 (VDD = 3.3 V)); IA = inactive, no pull-up/down
enabled.
[2]
5 V tolerant pad. RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to reset the chip and wake up
from Deep power-down mode. An external pull-up resistor is required on this pin for the Deep power-down mode. See Figure 52 for the
reset pad configuration.
[3]
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 51).
[4]
I2C-bus pads compliant with the I2C-bus specification for I2C standard mode and I2C Fast-mode Plus. The pin requires an external
pull-up to provide output functionality. When power is switched off, this pin is floating and does not disturb the I2C lines. Open-drain
configuration applies to all functions on this pin.
[5]
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled, and the pin is not 5 V tolerant (see Figure 51).
PIO1_7/TXD/
CT32B0_MAT1
32[3]
no
I/O
I;PU
PIO1_7 — General purpose digital input/output pin.
O-
TXD — Transmitter output for UART.
O-
CT32B0_MAT1 — Match output 1 for 32-bit timer 0.
PIO1_8/
CT16B1_CAP0
7[3]
no
I/O
I;PU
PIO1_8 — General purpose digital input/output pin.
I-
CT16B1_CAP0 — Capture input 0 for 16-bit timer 1.
PIO1_9/
CT16B1_MAT0
12[3]
no
I/O
I;PU
PIO1_9 — General purpose digital input/output pin.
O-
CT16B1_MAT0 — Match output 0 for 16-bit timer 1.
PIO1_10/AD6/
CT16B1_MAT1
20[5]
no
I/O
I;PU
PIO1_10 — General purpose digital input/output pin.
I-
AD6 — A/D converter, input 6.
O-
CT16B1_MAT1 — Match output 1 for 16-bit timer 1.
PIO1_11/AD7
27[5]
no
I/O
I;PU
PIO1_11 — General purpose digital input/output pin.
I-
AD7 — A/D converter, input 7.
PIO2_0
Port 2 — Port 2 is a 12-bit I/O port with individual direction and
function controls for each bit. The operation of port 2 pins depends on
the function selected through the IOCONFIG register block. Pins
PIO2_1 to PIO2_11 are not available.
PIO2_0/DTR
1[3]
no
I/O
I;PU
PIO2_0 — General purpose digital input/output pin.
O-
DTR — Data Terminal Ready output for UART.
PIO3_0 to PIO3_5
Port 3 — Port 3 is a 12-bit I/O port with individual direction and
function controls for each bit. The operation of port 3 pins depends on
the function selected through the IOCONFIG register block. Pins
PIO3_0, PIO3_1, PIO3_3 and PIO3_6 to PIO3_11 are not available.
PIO3_2
28[3]
no
I/O
I;PU
PIO3_2 — General purpose digital input/output pin.
PIO3_4
13[3]
no
I/O
I;PU
PIO3_4 — General purpose digital input/output pin.
PIO3_5
14[3]
no
I/O
I;PU
PIO3_5 — General purpose digital input/output pin.
VDD
6; 29 -
I
-
3.3 V supply voltage to the internal regulator, the external rail, and the
ADC. Also used as the ADC reference voltage.
XTALIN
4[6]
-
I
-
Input to the oscillator circuit and internal clock generator circuits. Input
voltage must not exceed 1.8 V.
XTALOUT
5[6]
-
O
-
Output from the oscillator amplifier.
VSS
33
-
-
-
Thermal pad. Connect to ground.
Table 9.
LPC1100 and LPC1100L series: LPC1111/12/13/14 pin description table (HVQFN33 package) …continued
Symbol
Pin
Start
logic
input
Type
Reset
state
[1]
Description



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