LPC1111FDH20SLASH002 datasheet(72/127 Pages) NXP

72 / 127 page

LPC111X

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Product data sheet

Rev. 9.2 — 26 March 2014

72 of 127

NXP Semiconductors

LPC1110/11/12/13/14/15

32-bit ARM Cortex-M0 microcontroller

10.5 Power consumption LPC1100 series (LPC111x/101/201/301)

Power measurements in Active, Sleep, and Deep-sleep modes were performed under the

following conditions (see LPC111x user manual):

• Configure all pins as GPIO with pull-up resistor disabled in the IOCONFIG block.

• Configure GPIO pins as outputs using the GPIOnDIR registers.

• Write 0 to all GPIOnDATA registers to drive the outputs LOW.

Conditions: Tamb = 25 C; active mode entered executing code while(1){} from flash; all

peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral

clocks disabled; internal pull-up resistors disabled; BOD disabled.

(1) System oscillator and system PLL disabled; IRC enabled.

(2) System oscillator and system PLL enabled; IRC disabled.

Fig 18. Active mode: Typical supply current IDD versus supply voltage VDD for different

system clock frequencies (for LPC111x/101/201/301)

VDD (V)

1.8

3.6

3.0

2.4

002aaf390

IDD

(mA)

12 MHz(1)

24 MHz(2)

36 MHz(2)

48 MHz(2)

LPC1111FDH20/002 Datasheet(PDF) 72 Page - NXP Semiconductors