LPC1111FDH20SLASH002 datasheet(80/127 Pages) NXP

80 / 127 page

LPC111X

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Product data sheet

Rev. 9.2 — 26 March 2014

80 of 127

NXP Semiconductors

LPC1110/11/12/13/14/15

32-bit ARM Cortex-M0 microcontroller

Conditions: VDD = 3.3 V; active mode entered executing code while(1){} from flash; all

peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral

clocks disabled; internal pull-up resistors disabled; BOD disabled; low-current mode.

1 MHz to 6 MHz: system oscillator enabled; PLL, IRC disabled.

12 MHz: IRC enabled; system oscillator, PLL disabled.

24 MHz to 48 MHz: IRC disabled; system oscillator, PLL enabled.

Fig 29. Active mode: Typical supply current IDD versus temperature for different system

clock frequencies (for LPC111xXL)

Conditions: VDD = 3.3 V; sleep mode entered from flash; all peripherals disabled in the

SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral clocks disabled; internal

pull-up resistors disabled; BOD disabled; low-current mode.

1 MHz to 6 MHz: system oscillator enabled; PLL, IRC disabled.

12 MHz: IRC enabled; system oscillator, PLL disabled.

24 MHz to 48 MHz: IRC disabled; system oscillator, PLL enabled.

Fig 30. Sleep mode: Typical supply current IDD versus temperature for different system

clock frequencies (for LPC111xXL)

LPC1111FDH20/002 Datasheet(PDF) 80 Page - NXP Semiconductors