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LPC1111FDH20/002 Datasheet(PDF) 45 Page - NXP Semiconductors |
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LPC1111FDH20/002 Datasheet(HTML) 45 Page - NXP Semiconductors |
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45 / 127 page ![]() LPC111X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 9.2 — 26 March 2014 45 of 127 NXP Semiconductors LPC1110/11/12/13/14/15 32-bit ARM Cortex-M0 microcontroller 7. Functional description 7.1 ARM Cortex-M0 processor The ARM Cortex-M0 is a general purpose, 32-bit microprocessor, which offers high performance and very low power consumption. 7.2 On-chip flash program memory The LPC1110/11/12/13/14/15 contain 64 kB (LPC1115), 56 kB (LPC1114/333), 48 kB (LPC1114/323), 32 kB (LPC1114), 24 kB (LPC1113), 16 kB (LPC1112), 8 kB (LPC1111) or 4 kB (LPC1110) of on-chip flash memory. 7.3 On-chip SRAM The LPC1110/11/12/13/14/15 contain a total of 8 kB, 4 kB, 2 kB, or 1 kB on-chip static RAM memory. 7.4 Memory map The LPC1110/11/12/13/14/15 incorporate several distinct memory regions, shown in the following figures. Figure 14 shows the overall map of the entire address space from the user program viewpoint following reset. The interrupt vector area supports address remapping. The AHB peripheral area is 2 MB in size, and is divided to allow for up to 128 peripherals. The APB peripheral area is 512 kB in size and is divided to allow for up to 32 peripherals. Each peripheral of either type is allocated 16 kB of space. This allows simplifying the address decoding for each peripheral. |
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