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LPC1111FDH20/002 Datasheet(PDF) 97 Page - NXP Semiconductors |
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LPC1111FDH20/002 Datasheet(HTML) 97 Page - NXP Semiconductors |
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97 / 127 page ![]() LPC111X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 9.2 — 26 March 2014 97 of 127 NXP Semiconductors LPC1110/11/12/13/14/15 32-bit ARM Cortex-M0 microcontroller 12. Application information 12.1 ADC usage notes The following guidelines show how to increase the performance of the ADC in a noisy environment beyond the ADC specifications listed in Table 18: • The ADC input trace must be short and as close as possible to the LPC1110/11/12/13/14/15 chip. • The ADC input traces must be shielded from fast switching digital signals and noisy power supply lines. • Because the ADC and the digital core share the same power supply, the power supply line must be adequately filtered. • To improve the ADC performance in a very noisy environment, put the device in Sleep mode during the ADC conversion. 12.2 Use of ADC input trigger signals For applications that use trigger signals to start conversions and require a precise sample frequency, ensure that the period of the trigger signal is an integral multiple of the period of the ADC clock. 12.3 XTAL input The input voltage to the on-chip oscillators is limited to 1.8 V. If the oscillator is driven by a clock in slave mode, it is recommended that the input be coupled through a capacitor with Ci = 100 pF. To limit the input voltage to the specified range, choose an additional capacitor to ground Cg which attenuates the input voltage by a factor Ci/(Ci + Cg). In slave mode, a minimum of 200 mV (RMS) is needed. In slave mode the input clock signal should be coupled by means of a capacitor of 100 pF (Figure 49), with an amplitude between 200 mV (RMS) and 1000 mV (RMS). This corresponds to a square wave signal with a signal swing of between 280 mV and 1.4 V. The XTALOUT pin in this configuration can be left unconnected. External components and models used in oscillation mode are shown in Figure 50 and in Table 30 and Table 31. Since the feedback resistance is integrated on chip, only a crystal and the capacitances CX1 and CX2 need to be connected externally in case of Fig 49. Slave mode operation of the on-chip oscillator LPC1xxx XTALIN Ci 100 pF Cg 002aae788 |
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