LPC1111FDH20SLASH002 datasheet(73/127 Pages) NXP

73 / 127 page

LPC111X

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Product data sheet

Rev. 9.2 — 26 March 2014

73 of 127

NXP Semiconductors

LPC1110/11/12/13/14/15

32-bit ARM Cortex-M0 microcontroller

Conditions: VDD = 3.3 V; active mode entered executing code while(1){} from flash; all

peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral

clocks disabled; internal pull-up resistors disabled; BOD disabled.

(1) System oscillator and system PLL disabled; IRC enabled.

(2) System oscillator and system PLL enabled; IRC disabled.

Fig 19. Active mode: Typical supply current IDD versus temperature for different system

clock frequencies (for LPC111x/101/201/301)

Conditions: VDD = 3.3 V; sleep mode entered from flash; all peripherals disabled in the

SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral clocks disabled; internal

pull-up resistors disabled; BOD disabled.

(1) System oscillator and system PLL disabled; IRC enabled.

(2) System oscillator and system PLL enabled; IRC disabled.

Fig 20. Sleep mode: Typical supply current IDD versus temperature for different system

clock frequencies (for LPC111x/101/201/301)

temperature (

°C)

−40

−15

002aaf391

IDD

(mA)

12 MHz(1)

24 MHz(2)

36 MHz(2)

48 MHz(2)

002aaf392

temperature (

°C)

−40

−15

IDD

(mA)

12 MHz(1)

36 MHz(2)

48 MHz(2)

24 MHz(2)

LPC1111FDH20/002 Datasheet(PDF) 73 Page - NXP Semiconductors

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