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HD404374FT Datasheet(PDF) 45 Page - Renesas Technology Corp |
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HD404374FT Datasheet(HTML) 45 Page - Renesas Technology Corp |
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45 / 161 page ![]() HD404374/HD404384/HD404389/HD404082/HD404084 Series Rev.5.00, Sep.11.2003, page 45 of 161 Reset by pin input or watchdog timer Reset (TMA3=0) (TMA3=1) Timer A, 0 or 0 interrupt Standby mode Active mode SBY instruction interrupt SBY instruction interrupt STOP instruction (TMA3=1,LSON=0) (TMA3=1,LSON=1) fosc : fx : fcyc : fw : fSUB : CPU : CLK : PER : LSON : DTON : TMA3 : Main oscillator frequency Sub-oscillator frequency (for realtime clock) fOSC/32 or fOSC/4 (selected by software) fx/8 fx/8 or fx/4 (selected by software) System clock Clock for realtime clock Peripheral function clock Low speed on flag Direct transfer on flag Timer mode register A bit3 Timer A, 0 or 0 interrupt 0 STOP instruction 0 STOP instruction STOP instruction Stop mode (TMA3=0,SSR3=0,LSON=0) (TMA3=0,SSR3=1,LSON=0) Subactive mode *4 *2 *3 *1 *5 DTON 1 0 Don't care 0 Transition Condition STOP/SBY instruction STOP/SBY instruction STOP/SBY instruction STOP/SBY instruction LSON 0 0 1 0 *1 *2 *3 *4 TMA3 1 1 1 0 Watch mode fosc fx CPU CLK PER : Stop : Stop : Stop : Stop : Stop fosc fx CPU CLK PER : Active : Active : fcyc : fcyc : fcyc fosc fx CPU CLK PER : Stop : Active : Stop : Stop : Stop fosc fx CPU CLK PER : Active : Active : Stop : fcyc : fcyc fosc fx CPU CLK PER : Stop : Active : fSUB : fw : fSUB fosc fx CPU CLK PER : Active : Active : fcyc : fw : fcyc fosc fx CPU CLK PER : Active : Active : Stop : fw : fcyc fosc fx CPU CLK PER : Stop : Active : Stop : fw : Stop fosc fx CPU CLK PER : Stop : Active : Stop : fw : Stop *5 Applies to HD404384, HD404389, HD404082, and HD404084 Series. Note: Watch mode and subactive mode apply to HD404374 Series. Figure 11 MCU Status Transitions |
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