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HD404374FT Datasheet(PDF) 94 Page - Renesas Technology Corp |
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HD404374FT Datasheet(HTML) 94 Page - Renesas Technology Corp |
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94 / 161 page ![]() HD404374/HD404384/HD404389/HD404082/HD404084 Series Rev.5.00, Sep.11.2003, page 94 of 161 Idle high/low control: When the serial interface is in the STS instruction wait state or the serial clock wait state (i.e. when idle), the output level of the SO pin can be set arbitrarily by software. Idle high/low control is performed by writing the output level to bit 1 (SMR21) of serial mode register 2 (SMR2). An example of idle high/low control is shown in figure 54. Idle high/low control cannot be performed in the transfer state. |
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