HD404374FT datasheet(54/161 Pages) RENESAS

54 / 161 page

HD404374/HD404384/HD404389/HD404082/HD404084 Series

Rev.5.00, Sep.11.2003, page 54 of 161

Internal Oscillator Circuit

Figure 20 shows the clock pulse generator circuit. As shown in table 21, a ceramic oscillator or crystal

oscillator can be connected to OSC1 and OSC2, and a 32.768 kHz crystal oscillator can be connected to X1

and X2. External clock operation is possible for the system oscillator. CR oscillation for system oscillator

is possible. CR oscillation function is optional. Set bit 1 (SSR1) of the system clock select register (SSR:

$004) according to the frequency of the oscillator connected to OSC1 and OSC2 (figure 22).

Note:

If the setting of bit 1 in the system clock select register does not match the frequency of the system

oscillator, the subsystem using 32.768 kHz oscillation will not operate correctly in the HD404374

Series.

Also, the CR oscillation frequency differs depending on the operating voltage and resistance value. Set bit 1

of the system clock select register to match the operating frequency. Note that if the frequency being used

does not match the setting of bit 1 of the system clock select register, subsystems using the 32.768 kHz

oscillation frequency will not operate correctly.

OSC1

LSON

System

clock

selection

circuit

OSC2

System

oscillator

1/4 or 1/32

division

circuit*

Timing

generation

circuit

fOSC

fcyc

tcyc

Sub

system

clock

oscillator

1/8 or 1/4

division

circuit*

Timing

generator

circuit

fSUB

tsubcyc

1/8

division

circuit

Timing

generation

circuit

twcyc

CPU

PER

CPU

• ROM

• RAM

• Registers, flags

• I/O

Peripheral

functions

Interrupts

TMA3 bit

Timer A

interrupts

Time

base

clock

selection

circuit

CLK

Notes: * The division ratio can be selected by setting bit 0 or bit 2 in the system clock select register

(SSR:$004).

HD404374 series

Figure 20 Clock Pulse Generator Circuit

HD404374FT Datasheet(PDF) 54 Page - Renesas Technology Corp

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