HD404374FT datasheet(100/161 Pages) RENESAS

100 / 161 page

HD404374/HD404384/HD404389/HD404082/HD404084 Series

Rev.5.00, Sep.11.2003, page 100 of 161

SMR21

R22/SI/SO pin output buffer control

PMOS active

PMOS off (NMOS open-drain output)

SMR22

Idle high/low control

SO pin set to low-level output in idle state

SO pin set to high-level output in idle state

Serial mode register 2 (SMR2: $025)

Bit

Read/Write

Initial value on reset

Bit name

—

SMR22

undeternined

SMR21

—

Figure 57 Serial Mode Register 2 (SMR2)

Serial data register (SRL: $026, SRU: $027):

The serial data register (SRL, SRU) has the following functions. See figures 58 and 59.

• Transmit data write and shift operations

• Receive data shift and read operations

The data written to the serial data register (SRL, SRU) is output LSB-first from the SO pin in

synchronization with the falling edge of the serial clock.

External data input LSB-first from the SI pin is latched in synchronization with the rising edge of the serial

clock. Figure 60 shows the serial clock and data input/output timing chart.

Writing and reading of the serial data register (SRL, SRU) must be performed only after data

transmission/reception is completed. The data contents are not guaranteed if a read or write is performed

during data transmission or reception.

HD404374FT Datasheet(PDF) 100 Page - Renesas Technology Corp