HD404374FT datasheet(104/161 Pages) RENESAS

104 / 161 page

HD404374/HD404384/HD404389/HD404082/HD404084 Series

Rev.5.00, Sep.11.2003, page 104 of 161

A/D Converter (HD404374/HD404384/HD404389 Series)

The MCU has a built-in successive approximation type A/D converter using a resistance ladder method,

capable of digital conversion of four analog inputs with an 10-bit resolution. The A/D converter block

diagram is shown in figure 63.

The A/D converter comprises the following four registers.

• A/D mode register (AMR: $028)

• A/D start flag (ADSF: $020,2)

• A/D data register (ADRL: $029, ADRM: $02A, ADRU: $02B)

• Module standby register 2 (MSR2: $00E)

Note : With the HD404374, HD404384, and HD404389 Series emulator, write 1 to bit 0 (ADRL0) of A/D

data register-lower (ADRL). This bit need not be written in the mask ROM and ZTAT

TM versions

in these series, although writing 1 will have no effect.

Interrupt flag

(IFAD)

Encoder

A/D data

(ADRU, ADRM, ADRL)

Conversion time control

A/D

start flag

(ADSF)

COMP

Reference

voltage control

R70/AN0

R71/AN1

R72/AN2

*AN4

*AN5

R73/AN3

–

A/D

control

logic

A/D mode

(AMR)

AVCC

Note: * Applies to HD404389 Series.

AVSS

D/A

Operating mode signal (set to 1 in

stop, watch, and subactive modes,

and during module standby)

Figure 63 A/D Converter Block Diagram

HD404374FT Datasheet(PDF) 104 Page - Renesas Technology Corp

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