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HD404374FT Datasheet(PDF) 106 Page - Renesas Technology Corp |
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HD404374FT Datasheet(HTML) 106 Page - Renesas Technology Corp |
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106 / 161 page ![]() HD404374/HD404384/HD404389/HD404082/HD404084 Series Rev.5.00, Sep.11.2003, page 106 of 161 Bit Read/Write Initial value on reset Bit name 3 R/W 0 DTON 2 R/W 0 ADSF 1 R/W 0 WDON 0 R/W 0 LSON A/D start flag (ADSF: $020,2) 1 0 DTON (see low-power mode section) WDON (see timer section) LSON (see low-power mode section) A/D start flag (ADSF) A/D conversion starts Indicates end of A/D conversion Figure 65 A/D Start Flag (ADSF) A/D data register (ADRL: $029, ADRM: $02A, ADRU: $02B): The A/D data register is a read-only register consisting of a middle 4 bits and lower 2 bits. This register is not cleared by a reset. Also, data read during A/D conversion is not guaranteed. At the end of A/D conversion, the resulting 10-bit data is stored in this register, and is held until the next conversion operation starts (figures 66, 67, 68, and 69). MSB LSB bit9 bit0 ADRU : $02B ADRM : $02A ADRL : $029 3 2 1 0 3 2 1 0 3 2 Figure 66 A/D Data Register |
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