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7512 Datasheet(PDF) 39 Page - Renesas Technology Corp |
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7512 Datasheet(HTML) 39 Page - Renesas Technology Corp |
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39 / 87 page ![]() Feb 18, 2005 page 39 of 85 REJ03B0122-0101 7512 Group PULSE WIDTH MODULATION (PWM) The 7512 Group has a PWM function with an 8-bit resolution, based on a signal that is the clock input XIN or that clock input di- vided by 2. Data Setting The PWM output pin also functions as port P44 or port P07. The PWM output pin can be selected to either port P44/PWM0 or port P07/PWM1 by bit 2 (PWM output pin selectoin bit) of the PWM control register. Set the PWM period by the PWM prescaler, and set the “H” term of output pulse by the PWM register. If the value in the PWM prescaler is n and the value in the PWM register is m (where n = 0 to 255 and m = 0 to 255) : PWM period = 255 ✕ (n+1) / f(XIN) = 63.75 ✕ (n+1) µs (when f(XIN) = 4 MHz) Output pulse “H” term = PWM period ✕ m / 255 = 0.25 ✕ (n+1) ✕ m µs (when f(XIN) = 4 MHz) Fig. 40 Timing of PWM period Fig. 41 Block diagram of PWM function PWM Operation When bit 0 (PWM enable bit) of the PWM control register is set to “1”, operation starts by initializing the PWM output circuit, and pulses are output starting at an “H”. If the PWM register or PWM prescaler is updated during PWM output, the pulses will change in the cycle after the one in which the change was made. 63.75 ✕ m ✕ (n+1) 255 T = [63.75 ✕ (n+1)] PWM output m: Contents of PWM register n : Contents of PWM prescaler T : PWM period (when f(XIN) = 4 MHz µs µs PWM prescaler pre-latch PWM register pre-latch Transfer control circuit PWM prescaler latch PWM prescaler PWM register 1/2 XIN PWM enable bit PWM register latch Data bus "1" "0" Count source selection bit Port P44 latch PortP44/PWM0 PortP07/PWM1 PWM output pin selection bit Port P07 latch |
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