7512 datasheet(64/87 Pages) RENESAS

64 / 87 page

Feb 18, 2005

page 64 of 85

REJ03B0122-0101

7512 Group

Fig. 72 CPU rewrite mode set/release flowchart

Figure 72 shows a flowchart for setting/releasing CPU rewrite

mode.

Notes 1: Set bits 6, 7 (main clock division ratio selection bits) at CPU mode register (003B16).

2: Before exiting the CPU rewrite mode after completing erase or program operation,

always be sure to execute the read array command.

End

Start

Execute read array command (Note 2)

Single-chip mode or Boot mode

Set CPU mode register (Note 1)

Using software command execute erase,

program, or other operation

Jump to control program transferred in RAM

(Subsequent operations are executed by control

program in this RAM)

Transfer CPU rewrite mode control program

to RAM

Write “0” to CPU rewrite mode select bit

Set CPU rewrite mode select bit to “1”

(by writing “0” and then “1” in succession)

Check CPU rewrite mode entry flag

E/W0 mode

Set All user block E/W enable bit “1”

(by writing “0” and then “1” in succession)

Set 8KB user block E/W enable bit

(writing “0” in case of E/W prohibit, writing “0” and

then “1” in succession, in case of E/W enable)

Set All user block E/W enable bit = “0”

Set 8KB user block E/W enable bit = “0”

End

Start

Execute read array command (Note 2)

Single-chip mode or Boot mode

Set CPU mode register (Note 1)

Using software command execute erase

program, or other operation

Set CPU rewrite mode select bit to “1”

(by writing “0” and then “1” in succession)

Write “0” to CPU rewrite mode select bit

Set E/W1 mode select bit = “1”

(by writing “0” and then “1” in succession)

Check CPU rewrite mode entry flag

E/W1 mode

Set All user block E/W enable bit = “0”

Set 8KB user block E/W enable bit = “0”

Set All user block E/W enable bit “1”

(by writing “0” and then “1” in succession)

Set 8KB user block E/W enable bit

(writing “0” in case of E/W prohibit, writing “0” and

then “1” in succession, in case of E/W enable)

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