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4502 Datasheet(PDF) 201 Page - Renesas Technology Corp

Part # 4502
Description  4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES
PDF  214 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

4502 Datasheet(HTML) 201 Page - Renesas Technology Corp

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3.3 List of precautions
3-31
4502 Group
APPENDIX
Rev.2.01
Feb 02, 2005
REJ09B0193-0201
3.3.5 Notes on timer
(1)
Prescaler
Stop the prescaler operation to change its frequency dividing ratio.
(2)
Count source
Stop timer 1 or 2 counting to change its count source.
(3)
Reading the count values
Stop timer 1 or 2 counting and then execute the TAB1 or TAB2 instruction to read its data.
(4)
Writing to the timer
Stop timer 1 or 2 counting and then execute the T1AB or T2AB instruction to write its data.
(5)
Writing to reload register R1
When writing data to reload register R1 while timer 1 is operating, avoid a timing when timer 1
underflow.
(6)
Timer 1 and timer 2 count start timing and count time when operation starts
Count starts from the first rising edge of the count source (2) after timer 1 and timer 2 operations start (1).
Time to first underflow (3) is shorter (for up to 1 period of the count source) than time among next
underflow (4) by the timing to start the timer and count source operations after count starts.
When selecting CNTR input as the count source of timer 2, timer 2 operates synchronizing with the
falling edge of CNTR input.
Parameter
Timer external input period
(“H” and “L” pulse width)
Condition
High-speed mode
Middle-speed mode
Low-speed mode
Default mode
Min.
3/f(XIN)
6/f(XIN)
12/f(XIN)
24/f(XIN)
Unit
s
Typ.
Max.
Rating value
Fig. 3.3.4
Timer count start timing and count time when operation starts (T1, T2)
(1) Timer
Count Source
Timer Value
Timer Underflow
Signal
3
21
032
103
2
Count Source
(CNTR input)
(2)
(3)
(4)
(7)
Watchdog timer
• The watchdog timer function is valid after system is released from reset. When not using the
watchdog timer function, execute the DWDT instruction and the WRST instruction continuously, and
clear the WEF flag to “0” to stop the watchdog timer function.
• The watchdog timer function is valid after system is returned from the RAM back-up. When not
using the watchdog timer function, execute the DWDT instruction and the WRST instruction continu-
ously every system is returned from the RAM back-up, and stop the watchdog timer function.
(8) Pulse width input to CNTR pin
Table 3.3.2 shows the recommended operating condition of pulse width input to CNTR pin.
Table 3.3.2 Recommended operating condition of pulse width input to CNTR pin



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