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SH7713 Datasheet(PDF) 573 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 573 Page - Renesas Technology Corp |
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573 / 904 page  Section 16 Serial Communication Interface with FIFO (SCIF) Rev.1.50 Aug. 30, 2006 Page 533 of 860 REJ09B0288-0150 Module data bus SCFRDR_n (16-stage) SCRSR_n RxDn TxDn SCIFnCK SCFTDR_n (16-stage) SCTSR_n SCLSR_n SCFCR_n SCFSR_n SCSCR_n SCSMR_n SCBRR_n Baud rate generator Transmission/ reception control Clock External clock P φ P φ/4 P φ/16 P φ/64 TXIn RXIn SCIFn SCRSR_n: SCFRDR_n: SCTSR_n: SCFTDR_n: SCSMR_n: SCSCR_n: [Legend] Receive shift register Receive FIFO data register Transmit shift register Transmit FIFO data register Serial mode register Serial control register SCFSR_n: SCBRR_n: SCFCR_n: SCFDR_n: SCLSR_n: n: Serial status register Bit rate register FIFO control register FIFO data count register Line status register 0, 1 SCFDR_n CTSn RTSn BRIn Parity generation Parity check Internal data bus ERIn Figure 16.1 Block Diagram of SCIF |
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