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SH7713 Datasheet(PDF) 575 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 575 Page - Renesas Technology Corp |
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575 / 904 page  Section 16 Serial Communication Interface with FIFO (SCIF) Rev.1.50 Aug. 30, 2006 Page 535 of 860 REJ09B0288-0150 16.3 Register Descriptions The SCIF has the following registers. For details on addresses and access sizes of these registers, see section 23, List of Registers. Channel 0: • Serial mode register_0 (SCSMR_0) • Bit rate register_0 (SCBRR_0) • Serial control register_0 (SCSCR_0) • Transmit FIFO data register_0 (SCFTDR_0) • Serial status register_0 (SCFSR_0) • Receive FIFO data register_0 (SCFRDR_0) • FIFO control register_0 (SCFCR_0) • FIFO data count register_0 (SCFDR_0) • Line status register_0 (SCLSR_0) • Receive shift register_0 (SCRSR_0) • Transmit shift register_0 (SCTSR_0) Channel 1: • Serial mode register_1 (SCSMR_1) • Bit rate register_1 (SCBRR_1) • Serial control register_1 (SCSCR_1) • Transmit FIFO data register_1 (SCFTDR_1) • Serial status register_1 (SCFSR_1) • Receive FIFO data register_1 (SCFRDR_1) • FIFO control register_1 (SCFCR_1) • FIFO data count register_1 (SCFDR_1) • Line status register_1 (SCLSR_1) • Receive shift register_1 (SCRSR_1) • Transmit shift register_1 (SCTSR_1) |
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