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SH7713 Datasheet(PDF) 640 Page - Renesas Technology Corp

Part # SH7713
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  904 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7713 Datasheet(HTML) 640 Page - Renesas Technology Corp

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Section 17 Serial I/O with FIFO (SIOF)
Rev.1.50 Aug. 30, 2006 Page 600 of 860
REJ09B0288-0150
Bit
Bit Name
Initial
Value
R/W
Description
0
RXRST
0
R/W
Reception Reset
This bit setting becomes valid immediately. When the 1
setting for this bit becomes valid, the SIOF immediately
disables reception from the RXD_SIO pin, and initializes
the reception data register and reception-related status
register. The following are initialized.
• SIRDR
• Receive FIFO write/read pointer
• RCRDY, RFFUL, and RDREQ bits in SISTR
• RXE bit
As the SIOF is cleared automatically at the completion of
reset operation, this bit is always read as 0.
0: Reception operation is not reset
1: Resets reception operation



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