SH7713 datasheet(698/904 Pages) RENESAS

Part #	SH7713

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	904 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 18 Ethernet Controller (EtherC)

Rev.1.50 Aug. 30, 2006 Page 658 of 860

REJ09B0288-0150

selected, which does not require carrier detection, the preamble is sent as soon as a transmit

request is issued by the E-DMAC.

3. The transmitter sends the SFD, data, and CRC sequentially. At the end of transmission, the

transmit E-DMAC generates a transmission complete interrupt (TC). If a collision or the

carrier-not-detected state occurs during data transmission, these are reported as interrupt

sources.

4. After waiting for the frame interval time, the transmitter enters the idle state, and if there is

more transmit data, continues transmitting.

18.4.2

Reception

The EtherC receiver separates the frame from the MII into preamble, SFD, data and CRC, and the

fields from DA (destination address) to the data are transferred to the receive E-DMAC. Figure

18.3 shows the state transitions of the EtherC receiver.

SH7713 Datasheet(PDF) 698 Page - Renesas Technology Corp