SH7713 datasheet(718/904 Pages) RENESAS

718 / 904 page

Section 19 Ethernet Controller Direct Memory Access Controller (E-DMAC)

Rev.1.50 Aug. 30, 2006 Page 678 of 860

REJ09B0288-0150

Bit

Bit Name

Initial

Value

R/W

Description

TDE

R/W

Transmit Descriptor Empty

Indicates that the transmit descriptor valid bit (TACT)

of a transmit descriptor read by the E-DMAC is not

set if the previous descriptor does not represent the

end of a frame for the processing of multi-buffer

frame based on the single-frame/multi-descriptor. As

a result, an incomplete frame may be transmitted.

0: Transmit descriptor active bit TACT = 1 detected

1: Transmit descriptor active bit TACT = 0 detected

When transmission descriptor empty (TDE = 1)

occurs, execute a software reset and initiate

transmission. In this case, the address that is stored

in the transmit descriptor list address register

(TDLAR) is transmitted first.

TFUF

R/W

Transmit FIFO Underflow

Indicates that underflow has occurred in the transmit

FIFO during frame transmission. Incomplete data is

sent onto the line.

0: Underflow has not occurred

1: Underflow has occurred

R/W

Frame Reception

Indicates that a frame has been received and the

receive descriptor has been updated. This bit is set to

1 each time a frame is received.

0: Frame not received

1: Frame received

SH7713 Datasheet(PDF) 718 Page - Renesas Technology Corp