SH7713 datasheet(721/904 Pages) RENESAS

721 / 904 page

Section 19 Ethernet Controller Direct Memory Access Controller (E-DMAC)

Rev.1.50 Aug. 30, 2006 Page 681 of 860

REJ09B0288-0150

19.2.7

EtherC/E-DMAC Status Interrupt Permission Register (EESIPR)

EESIPR is a 32-bit readable/writable register that enables interrupts corresponding to individual

bits in the EtherC/E-DMAC status register (EESR). An interrupt is enabled by writing 1 to the

corresponding bit.

Bit

Bit Name

Initial

Value

R/W

Description



Reserved

This bit is always read as 0. The write value should

always be 0.

TWBIP

R/W

Write-Back Complete Interrupt Enable

0: Write-back complete interrupt is disabled

1: Write-back complete interrupt is enabled

29 to 27



All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

TABTIP

R/W

Transmit Abort Detection Interrupt Enable

0: Transmit abort detection interrupt is disabled

1: Transmit abort detection interrupt is enabled

RABTIP

R/W

Receive Abort Detection Interrupt Enable

0: Receive abort detection interrupt is disabled

1: Receive abort detection interrupt is enabled

RFCOFIP

R/W

Receive Frame Counter Overflow Interrupt Enable

0: Receive frame counter overflow interrupt is disabled

1: Receive frame counter overflow interrupt is enabled

ADEIP

R/W

Address Error Interrupt Enable

0: Address error interrupt is disabled

1: Address error interrupt is enabled

ECIIP

R/W

EtherC Status Register Interrupt Enable

0: EtherC status interrupt is disabled

1: EtherC status interrupt is enabled

TCIP

R/W

Frame Transmit Complete Interrupt Enable

0: Frame transmit complete interrupt is disabled

1: Frame transmit complete interrupt is enabled

SH7713 Datasheet(PDF) 721 Page - Renesas Technology Corp

SH7713 Datasheet(HTML) 721 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL