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SH7713 Datasheet(PDF) 726 Page - Renesas Technology Corp

Part # SH7713
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  904 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7713 Datasheet(HTML) 726 Page - Renesas Technology Corp

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Section 19 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Rev.1.50 Aug. 30, 2006 Page 686 of 860
REJ09B0288-0150
19.2.10
Transmit FIFO Threshold Register (TFTR)
TFTR is a 32-bit readable/writable register that specifies the transmit FIFO threshold at which the
first transmission is started. The actual threshold is 4 times the set value. The EtherC starts
transmission when the amount of data in the transmit FIFO exceeds the number of bytes specified
by this register, when the transmit FIFO is full, or when 1-frame write is executed. When setting
this register, do so in the transmission-halt state.



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