SH7721 datasheet(658/1524 Pages) RENESAS

658 / 1524 page

Section 18

Serial Communication Interface with FIFO (SCIF)

Rev. 3.00 Jan. 18, 2008 Page 596 of 1458

REJ09B0033-0300

Bit

Bit Name

Initial Value R/W

Description

ERIE

R/W

Receive Error Interrupt Enable

Enables or disables the generation of a receive-error

(framing error/parity error) interrupt requested when

the ER flag in SCSSR is set to 1.

0: The receive-error interrupt disabled*

1: The receive-error interrupt enabled

Note:

The receive-error interrupt request is

cleared by reading the ER flag after it has

been set to 1, then clearing the flag to 0,

or clearing the ERIE bit to 0.

BRIE

R/W

Break Interrupt Enable

Enables or disables the generation of break-receive

interrupt requested when the BRK flag in SCSSR is

set to 1.

0: The break-receive interrupt disabled*

1: The break receive interrupt enabled

Note:

The break-receive interrupt request is

cleared by reading the BRK flag after it

has been set to 1, then clearing the flag to

0, or clearing the BRIE bit to 0.

DRIE

R/W

Receive Data Ready Interrupt Enable

Disables or enables the generation of receive-data-

ready interrupt when the DR flag in SCSSR is set to 1.

0: The receive-data-ready interrupt disabled

1: The receive-data-ready interrupt enabled

Note:

The receive-data-ready interrupt request is

cleared by reading the DR flag after it has

been set to 1, then clearing the flag to 0,

or clearing the DRIE bit to 0.

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