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SH7721 Datasheet(PDF) 852 Page - Renesas Technology Corp

Part # SH7721
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  1524 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7721 Datasheet(HTML) 852 Page - Renesas Technology Corp

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Section 24
USB Host Controller (USBH)
Rev. 3.00 Jan. 18, 2008 Page 790 of 1458
REJ09B0033-0300
24.3.21
Hc Rh Status Register (USBHRS)
USBHRS is divided into two parts. The lower word of a long word indicates the hub status bits
and the upper word indicates the hub status change bit. Reserved bits should be set to 0.
Bit
Bit Name
Initial
Value
R/W
Description
31
CRWE
0
W
Clear Remote Wakeup Enable
Writing a 1 to this bit clears DeviceRemoteWakeupEnable.
Writing 0 to this bit has no effect.
30 to 18
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
17
OCIC
0
R/W
Over Current Indicator Change
This bit is set when the OCI bit changes. Writing 1 clears
this bit. Writing 0 has no effect.
(Read) Local Power Status Change
The root hub does not support the local power status
function. Therefore, this bit is always read as 0.
16
LPSC
0
R/W
(Write) Set Global Power
This bit is written to 1 to power on (clears the PPS bit in
USBHRPS) all ports in global power mode (PSM bit in
USBHRDA = 0). This bit sets the PPS bit only to the port
in which the PPCM bit is not set in power mode at each
port. When a 0 is written to, this bit is not cleared.
(Read) Device Remote Wakeup Enable
This bit enables the CSC bit as a resume event and
generates the state transition from USBHSUSPEND1 to
USBRESUME and ResumeDetected interrupt.
0: ConnectStatusChange is not the remote wakeup event
1: ConnectStatusChange is the remote wakeup event.
15
DRWE
0
R/W
(Write) Set Remote Wakeup Enable
Writing a 1 sets DeviceRemoteWakeupEnable. Writing a 0
has no effect.
14 to 2
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.



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