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SH7721 Datasheet(PDF) 856 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 856 Page - Renesas Technology Corp |
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856 / 1524 page ![]() Section 24 USB Host Controller (USBH) Rev. 3.00 Jan. 18, 2008 Page 794 of 1458 REJ09B0033-0300 Bit Bit Name Initial Value R/W Description (Read) Low Speed Device Attached This bit indicates the speed of the device attached to this port. When this bit is set, a low-seed device is attached to this port. When this bit is cleared, a full-speed device is attached to this port. This bit is valid only when the CCS bit is set. 0: A full-speed device is set 1: A low-speed device is set 9 LSDA 0 R/W (Write) Clear Port Power Writing a 1 clears the PPS bit. Writing a 0 has no effect. (Read) Port Power Status This bit reflects the power state of the port regardless of the power-switching mode to be executed. However, because the initial value of the NPS bit of the USBHRDA is 1, this bit is first fixed to 1. The NPS bit must first be cleared before the power is switched, as shown below. When an over-current condition is detected, this bit is cleared. Writing SetPortPower or SetGlovalPower sets this bit. Writing ClearPortPower or ClearGlobalPower clears this bit. The PSM bit in USBHRDA and the PPCM bit in USBHRDB determine which power control switch can be used. Only Set/ClearGlobalPower controls this bit in global switching mode (PSM= 0). If the PPCM bit of that port is set in power switching mode (PSM = 1), only the Set/ClearPortPower command is enabled. If the mask is not set, the Set/ClearGlovalPowerCommand is enabled. When the port power is disabled, the CCS, PES, PSS, and PRS are reset. 0: Port power is off 1: Port power is on Note: If power switching is not supported, this bit is always read as 1. 8 PPS 1 R/W (Write) Set Port Power Writing a 1 sets the PPS bit. Writing a 0 has no effect. 7 to 5 All 0 R Reserved These bits are always read as 0. The write value should always be 0. |
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