SH7721 datasheet(858/1524 Pages) RENESAS

858 / 1524 page

Section 24

USB Host Controller (USBH)

Rev. 3.00 Jan. 18, 2008 Page 796 of 1458

REJ09B0033-0300

Bit

Bit Name

Initial

Value

R/W

Description

(Read) Port Suspend Status

This bit indicates that the port is suspended or during the

resume sequence. Writing SetSuspendState sets this bit

and setting PSSC clears this bit at the end of the resume

interval. If the CCS bit is cleared, this bit cannot be set.

When the PRSC bit is set upon completion of the port

reset or HC is placed in the UsbResume state, this bit is

cleared. If an upstream resume is in progress, it is

transmitted to the host controller.

0: Port is not suspended

1: Port is selectively suspended

PSS

R/W

(Write) Set Port Suspend

Writing a 1 sets PortSuspendStatus. Writing a 0 has no

effect.

In addition, when the CCS bit is cleared, the PSS bit is not

set by this writing. Instead, the CSC bit is set. This reports

the suspended state of the power disconnection to the

driver.

(Read) Port Enable Status

This bit indicates whether the port is enabled or disabled.

The root hub clears this bit when the over-current

condition and an operational bus error such as disconnect

event, power-off switch, or babble is detected. The PESC

is set by this change. This bit is set by writing

SetPortEnable and cleared by writing ClearPortEnable.

This bit cannot be set when the CCS bit is cleared. In

addition, this bit is set upon completion of the port reset by

which the PRSCtatusChange is set, or uponcompletion of

the port suspend by which the PSSC is set.

0: Port disabled

1: Port enabled

PES

R/W

(Write) Set Port Enable

Writing a 1 sets the PES bit. Writing a 0 has no effect.

If the CCS bit is cleared, this writing does not set the PES

bit, instead, sets the CS. This reports the driver that the

power disconnection port has been tried to be enabled.

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