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SH7721 Datasheet(PDF) 1021 Page - Renesas Technology Corp

Part # SH7721
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  1524 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7721 Datasheet(HTML) 1021 Page - Renesas Technology Corp

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Section 29
PC Card Controller (PCC)
Rev. 3.00 Jan. 18, 2008 Page 959 of 1458
REJ09B0033-0300
29.1.1
PCMCIA Support
This LSI supports an interface based on PCMCIA specifications for physical areas 6. Interfaces
supported are the IC memory card interface and I/O card interface defined in the PCMCIA Rev.
2.1/JEIDA Ver. 4.2 standard. Both the IC memory card interface and I/O card interface are
supported in area 6.
Table 29.1
Features of the PCMCIA Interface
Item
Feature
Access
Random access
Data bus
8/16 bits
Memory type
Masked ROM, OTPROM, EPROM, EEPROM, flash memory, SRAM
Common memory capacity
Maximum 64 Mbytes (Supports full PCMCIA specifications by using
a segment bit (an address bit for the PC card))
Attribute memory capacity
Maximum 32 Mbytes
I/O space capacity
Maximum 32 Mbytes
Others
Dynamic bus sizing for I/O bus width*
The PCMCIA interface can be accessed from the address-
conversion region and non-address-conversion region.
Note:
*
Dynamic bus sizing for the I/O bus width is supported only in little-endian mode.
This LSI can directly access 32- and 64-Mbyte physical areas in a 64-Mbyte memory space and an
I/O space of the PC card (continuous 32/16-Mbyte area mode). This LSI provides a segment bit
(an address bit for the PC card) in the general control register for area 6 to support a common
memory space with full PCMCIA specifications (64 Mbytes).
(1)
Continuous 32-Mbyte Area Mode
Setting 0 (initial value) in bit 3 (P0MMOD) of the general control register enables the continuous
32-Mbyte area mode. In this mode, the attribute memory space and I/O memory space are 32
Mbytes and the common memory space is 64 Mbytes. In the common memory space, set 1 in bit 2
(P0PA25) of the general control register to access an address of more than 32 Mbytes. By this
operation, 1 is output to A25 pin, enabling an address space of more than 32 Mbytes to be
accessed. When an address of 32 Mbytes or less is accessed, set 0 in POPA25. This bit does not
affect access to attribute memory space or I/O memory space.
Figure 29.2 shows the relationship between the memory space of this LSI and the memory and I/O
spaces of the PC card in the continuous 32-Mbyte area mode. Memory space and I/O space are
supported in area 6.



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