SH7721 datasheet(240/1524 Pages) RENESAS

240 / 1524 page

Section 4 Memory Management Unit (MMU)

Rev. 3.00 Jan. 18, 2008 Page 178 of 1458

REJ09B0033-0300

VPN

Virtual address (1-kbyte page)

Virtual address (4-kbyte page)

TLB entry

Offset

VPN

VPN (31 to 17) VPN (11 to 10) ASID V

PR SZ

PPN

C D

Offset

(15)

(2)

(8)

(1)

(19)

(1) (1) (1) (1)

[Legend]

VPN:

Virtual page number

Upper 19 bits of virtual address for a 1-kbyte page, or upper 20 bits of logical address for a 4-kbyte page. Since VPN

bits 16 to 12 are used as the index number, they are not stored in the TLB entry. Attention must be paid to the

synonym problem (see section 4.4.4, Avoiding Synonym Problems).

ASID:

Address space identifier

Indicates the process that can access a virtual page. In single virtual memory mode and user mode, or in multiple

virtual memory mode, if the SH bit is 0, the address is compared with the ASID in PTEH when address comparison is

performed.

SH:

Share status bit

0: Page not shared between processes

1: Page shared between processes

SZ:

Page-size bit

0: 1-kbyte page

1: 4-kbyte page

Valid bit

Indicates whether entry is valid.

0: Invalid

1: Valid

Cleared to 0 by a power-on reset. Not affected by a manual reset.

PPN:

Physical page number

Upper 22 bits of physical address. PPN bits 11 to10 are not used in case of a 4-kbyte page.

PR:

Protection key field

2-bit field encoded to define the access rights to the page.

00: Reading only is possible in privileged mode.

01: Reading/writing is possible in privileged mode.

10: Reading only is possible in privileged/user mode.

11: Reading/writing is possible in privileged/user mode.

Cacheable bit

Indicates whether the page is cacheable.

0: Non-cacheable

1: Cacheable

Dirty bit

Indicates whether the page has been written to.

0: Not written to

1: Written to

Figure 4.7 Virtual address and TLB Structure

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