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7721 Datasheet(PDF) 122 Page - Renesas Technology Corp |
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7721 Datasheet(HTML) 122 Page - Renesas Technology Corp |
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122 / 577 page  TIMER A 7721 Group User’s Manual 8–3 8.2 Block description 8.2 Block description Figure 8.2.1 shows the block diagram of Timer A. Explanation of registers relevant to Timer A is described below. Data bus (odd) Data bus (even) f 2 f 16 f 64 f 512 Count source select bits Timer mode One-shot pulse mode PWM mode Polarity switching Timer mode (Gate function) Event counter mode Trigger Count start bit Countdown Up-down bit (Low-order 8 bits) (High-order 8 bits) Timer Ai reload register (16) Timer Ai counter (16) Timer Ai interrupt request bit Countup/Countdown switching (Always “count down” except for event counter mode) Toggle F.F. Pulse output function select bit TAj IN TAj OUT i = 0–4, j = 2–4 Fig. 8.2.1 Block diagram of Timer A |
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