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7721 Datasheet(PDF) 201 Page - Renesas Technology Corp |
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7721 Datasheet(HTML) 201 Page - Renesas Technology Corp |
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201 / 577 page ![]() REAL-TIME OUTPUT 7721 Group User’s Manual 10–8 Fig. 10.3.2 Initial setting example for registers relevant to real-time output (2) 10.3 Setting of real-time output From preceding “Figure 10.3.1” Processing of avoiding undefined output before starting pulse output (Note) b0 Timer A0 mode register (Address 5616) Timer A1 mode register (Address 5716) b7 0 Select of count source f2 0 0000 0 0 b7 Set to “000016” b0 b7 b0 (b15) (b8) 0016 0016 b0 b7 0 Interrupt disabled 00 0 No interrupt request b0 Count start register (Address 4016) b7 Timer A0 count start bit 1 : Start counting V When Timer A0 or A1 underflows, the contents of the pulse output data register 0 or 1 are output from the flip-flop. b0 b7 Setting Timers A0, A1 b0 b7 0 Count source select bits 000 0 0 b7 Can be set to “000016”–“FFFF16” (n) b0 b7 b0 (b15) (b8) 0016 0016 b0 b7 Interrupt priority level select bits When using interrupts, set these bits to one of levels 1 to 7. When disabling interrupts, set these bits to level 0. 0 0 0 : f2 0 1 : f16 1 0 : f64 1 1 : f512 b7 b6 Continue to “Figure 10.3.3” Note: This processing can be neglected if the system is not affected by undefined output. Timer A0 register (Addresses 4716, 4616) Timer A1 register (Addresses 4916, 4816) Timer A0 interrupt control register (Address 7516) Timer A1 interrupt control register (Address 7616) Timer A1 count start bit Count start register (Address 4016) Timer A0 count start bit Timer A1 count start bit 0 : Stop counting Timer A0 mode register (Address 5616) Timer A1 mode register (Address 5716) Timer A0 register (Addresses 4716, 4616) Timer A1 register (Addresses 4916, 4816) Timer A0 interrupt control register (Address 7516) Timer A1 interrupt control register (Address 7616) |
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