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7721 Datasheet(PDF) 198 Page - Renesas Technology Corp |
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7721 Datasheet(HTML) 198 Page - Renesas Technology Corp |
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198 / 577 page ![]() REAL-TIME OUTPUT 7721 Group User’s Manual 10–5 10.2 Block description 10.2.2 Pulse output data registers 0 and 1 Figure 10.2.2 shows the structure of the pulse output data registers 0 and 1. The bit position of the RTP02 and RTP03 pulse output data bits differs according to the pulse mode. Before setting the pulse output data registers 0 and 1, set of the pulse output mode select bit (bit 2 at address 6216). The data written into the pulse output data registers 0 and 1 is output from the corresponding pulse output pins every underflow of Timers A0 and A1. Bit Bit name Functions 0 1 2 3 7 to 4 RTP00 pulse output data bit Pulse output data register 0 (Address 1A16) b1 b0 b2 b3 b4 b5 b6 b7 At reset RW Undefined Undefined Undefined Undefined Undefined 0 : “L” level output 1 : “H” level output WO Note: Use the LDM or STA instruction for writing to this register RTP01 pulse output data bit WO WO WO RTP02 pulse output data bit (Valid in pulse mode 0) RTP03 pulse output data bit (Valid in pulse mode 0) Nothing is assigned. Bit Bit name Functions 0, 1 2 3 Nothing is assigned. Pulse output data register 1 (Address 1C16) b1 b0 b2 b3 b4 b5 b6 b7 At reset RW Undefined Undefined Undefined Undefined Undefined 0 : “L” level output 1 : “H” level output WO Note: Use the LDM or STA instruction for writing to this register. WO WO WO RTP03 pulse output data bit (Valid in pulse mode 1) 4 RTP02 pulse output data bit (Valid in pulse mode 1) RTP10 pulse output data bit 5 6 7 RTP11 pulse output data bit RTP12 pulse output data bit RTP13 pulse output data bit Undefined Undefined WO WO Fig. 10.2.2 Structure of pulse output data registers 0 and 1 |
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