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7906 Datasheet(PDF) 41 Page - Renesas Technology Corp |
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7906 Datasheet(HTML) 41 Page - Renesas Technology Corp |
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41 / 531 page ![]() 7906 Group User’s Manual Rev.2.0 2-20 CENTRAL PROCESSING UNIT (CPU) 2.5 Processor modes Fig. 2.5.3 Structure of processor mode register 0 2.5.2 Setting of processor mode The processor mode is set by the following: • Voltage level applied to the MD0 and MD1 pins • Processor mode bits (bits 1 and 0 at address 5E16) The VSS–level voltage must be applied to the MD0 and MD1 pins, because the M37906 operates only in the single-chip mode. Also, the processor mode bit must be “00.” Figure 2.5.2 shows the structure of the processor mode register 0 (address 5E16). 0 1 2 3 4 5 6 7 Bit name Bit Processor mode register 0 (Address 5E16) Function At reset R/W Processor mode bits Interrupt priority detection time select bits Software reset bit Fix this bit to “0.” b7 b6 b5 b4 b3 b2 b1 b0 0 0 : Single-chip mode 0 1 : Do not select. 1 0 : Do not select. 1 1 : Do not select. b1 b0 0 0 : 7 cycles of fsys 0 1 : 4 cycles of fsys 1 0 : 2 cycles of fsys 1 1 : Do not select. b5 b4 The microcomputer is reset by writing “1” to this bit. The value is “0” at reading. 0 0 0 1 0 0 0 0 RW RW RW RW RW RW WO RW 0X X 0 0 Any of these bits may be either “0” or “1.” X : It may be either “0” or “1.” |
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