7906 datasheet(64/531 Pages) RENESAS

Part #	7906

Description	16-BIT SINGLE-CHIP MICROCOMPUTER

PDF	531 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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CLOCK GENERATING CIRCUIT

7906 Group User’s Manual Rev.2.0

4-5

4.2.1 Clocks generated in clock generating circuit

(1) fXIN

It is the input clock from pin XIN.

(2) fPLL

It is the output clock from the PLL frequency multiplier.

(3) fsys

It is the system clock which becomes the clock source of CPU, BIU, and internal peripheral devices.

Whether fXIN = fsys or fPLL = fsys can be selected by software.

(4)

φCPU

It is the operating clock of CPU.

(5)

φBIU

It is the operating clock of BIU.

(6) Clock

φ1

It has the same period as fsys.

(7) f1, f2, f16, f64, f512, f4096

Each of them is the internal peripheral device’s operating clock.

(8) Wf32, Wf512

These are the operating clocks of the watchdog timer, and their clock source is f2.

(9) fX16, fX32, fX64, fX128

Each of them is the divide clock of fXIN and becomes the watchdog timer’s clock source at STP

termination.

4.2 Clocks

7906 Datasheet(PDF) 64 Page - Renesas Technology Corp