7906 datasheet(50/531 Pages) RENESAS

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RESET

7906 Group User’s Manual Rev.2.0

3-7

3.3 State of internal area

Fig. 3.3.2 State of SFR and internal RAM areas immediately after reset (1)

: It is possible to read the bit state at reading. The written value becomes valid.

: It is possible to read the bit state at reading. The written value becomes invalid.

: The written value becomes valid. It is impossible to read the bit state.

: Nothing is assigned. It is impossible to read the bit state. The written value becomes invalid.

qSFR area (Addresses 016 to FF16)

Access characteristics

: “0” immediately after reset.

: “1” immediately after reset.

: Undefined immediately after

reset.

: Always “0” at reading.

: Always “1” at reading.

: Always undefined at reading.

: “0” immediately after reset. Fix this bit to “0.”

State immediately after reset

10 16

11 16

12 16

13 16

14 16

15 16

16 16

17 16

18 16

19 16

1A16

1C16

1B16

1D16

1E16

1F16

0 16

1 16

2 16

3 16

4 16

5 16

6 16

7 16

8 16

9 16

B16

C16

D16

E16

F16

A16

Address

Port P5 register

Port P5 direction register

Port P6 register

Port P7 register

Port P6 direction register

Port P7 direction register

A-D control register 0

A-D control register 1

Port P1 register

Port P1 direction register

Port P2 direction register

Port P2 register

Access characteristics

State immediately after reset

(Note 2)

0016

(Note 2)

(Note 1)

Notes 1: Do not read and write.

2: Do not write.

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