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DM9013 Datasheet(PDF) 38 Page - Davicom Semiconductor, Inc. |
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DM9013 Datasheet(HTML) 38 Page - Davicom Semiconductor, Inc. |
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38 / 75 page ![]() DM9013 3-port switch with Processor Interface 38 Preliminary datasheet DM9013-15-DS-P03 April 9, 2009 6.69 Interrupt Mask Register (FFH) Bit Name Default Description 7 TXRX_EN PHS0,RW Enable the SRAM read/write pointer used as transmit /receive address. 6 RESERVED 0,RO Reserved 5 LNKCHGI PHS0,RW Enable Link Status Change of port 0 or 1Interrupt 4 CNT_ERR PHS0,RW/C1 Enable BLK Table Counter error interrupt 3 ROOI PHS0,RW Enable Receive Overflow Counter Overflow Interrupt 2 ROI PHS0,RW Enable Receive Overflow Interrupt 1 PTI PHS0,RW Enable Packet Transmitted Interrupt 0 PRI PHS0,RW Enable Packet Received Interrupt |
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