LPC1313 datasheet(57/60 Pages) NXP

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LPC1311_13_42_43_2

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Product data sheet

Rev. 02 — 6 May 2010

57 of 60

NXP Semiconductors

LPC1311/13/42/43

32-bit ARM Cortex-M3 microcontroller

14. Revision history

Table 22.

Revision history

Document ID

Release date

Data sheet status

Change notice Supersedes

LPC1311_13_42_43_2

20100506

Product data sheet

LPC1311_13_42_43_1

Modifications:

• Pin functions TRST, TDO, TMS, TDI replaced by R (Reserved).

• In Section 7.18.3, description of CRP modes updated: JTAG replaced by SWD.

• Description of standard I/O pads and RESET pad improved (Figure 30 and Figure 31).

• SSP dynamic characteristics: maximum value for parameter tDS removed and values

for tDH and th(Q) moved to minimum.

• Maximum data bit rates for SSP (Section 7.11.1) and UART (Section 7.10.1)

peripherals added.

• Details for external oscillator component selection added (Section 11.2).

• WDT oscillator frequency specification added (Section 7.17.1.3 and Table 14).

• VDD(3V3) and VDD(IO) supply voltages combined to VDD throughout the document. Pins

VDD(3V3) and VDD(IO) renamed to VDD in Table 3 and Table 4.

• Parameters ter and tprog added to Table 11.

• Parameters IOH, IOL, IOz changed to 0.5 nA (typ) and 10 nA (max) in Table 7.

• Parameters VIH changed to 0.7VDD and VOL changed to 0.3VDD throughout Table 7.

• Boot loader description via USB updated in Section 7.18.4.

• Feature list updated with items “Unique device serial number” and “Bootloader drivers

for MSC and HID” (Section 2).

• Section 11.6 “ADC usage notes” added.

• GPIO functional description updated (Section 7.8).

• Inputs to the system PLL changed (watchdog oscillator removed), see Figure 7.

• Description of disabling ISP entry mode clarified in Section 7.18.3.

• Description of the RESET pin functionality in Deep power-down mode added (Table

note 1 in Table 3 and Table 4.

• “Industrial networking” removed from Section 3.

• Table note 12 in Table 7 updated.

• Table 15 added for parameters tr and tf.

• Parameters Rvsi and Ri added to Table 8.

• Use of open-drain pins clarified for pins PIO0_4 and PIO0_5 in Table 3 and Table 4.

• Parameters Vi(xtal) and Vo(xtal) minimum value changed to −0.5 V in Table 7.

LPC1311_13_42_43_1

20091211

Product data sheet

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