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DAC8728 Datasheet(PDF) 45 Page - Texas Instruments |
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DAC8728 Datasheet(HTML) 45 Page - Texas Instruments |
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45 / 52 page  DAC8728 www.ti.com SBAS466A – JUNE 2009 – REVISED NOVEMBER 2009 Zero Register n (where n = 0 to 7). Default = 0000h. The Zero Register stores the user-calibration data that are used to eliminate the offset error, as shown in Table 14. The data are 16 bits wide, 1 LSB/step, and the total adjustment is –32768 LSB to +32767 LSB, or ±50% of full-scale range. The Zero Register uses a twos complement data format. Table 14. Zero Register D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Z15 Z14 Z13 Z12 Z11 Z10 Z9 Z8 Z7 Z6 Z5 Z4 Z3 Z2 Z1 Z0 Z15:Z0—OFFSET BITS ZERO ADJUSTMENT 7FFFh +32767 LSB 7FFEh +32766 LSB ••• ••• ••• ••• ••• ••• 0001h +1 LSB 0000h 0 LSB (default) FFFFh –1 LSB ••• ••• ••• ••• ••• ••• 8001h –32767 LSB 8000h –32768 LSB Gain Register n (where n = 0 to 7). Default = 8000h. The Gain Register stores the user-calibration data that are used to eliminate the gain error, as shown in Table 15. The data are 16 bits wide, 0.0015% FSR/step, and the total adjustment range 0.5 to 1.5. The Gain Register uses a straight binary data format. Table 15. Gain Register D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 G15 G14 G13 G12 G11 G10 G9 G8 G7 G6 G5 G4 G3 G2 G1 G0 G15:G0—GAIN-CODE BITS GAIN ADJUSTMENT COEFFICIENT FFFFh 1.499985 FFFEh 1.499969 ••• ••• ••• ••• ••• ••• 8001h 1.000015 8000h 1 (default) 7FFFh 0.999985 ••• ••• ••• ••• ••• ••• 0001h 0.500015 0000h 0.5 Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 45 Product Folder Link(s): DAC8728 |
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