DAC8728 datasheet(8/52 Pages) TI

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DAC8728

SBAS466A – JUNE 2009 – REVISED NOVEMBER 2009

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ELECTRICAL CHARACTERISTICS: Single-Supply (continued)

All specifications at TA = TMIN to TMAX, AVDD = +32V, AVSS = 0V, DVDD = +5V, REF-A and REF-B = +5V, gain = 6, AGND-x =

DGND = 0V, and OFFSET-A = OFFSET-B = AGND, unless otherwise noted.

DAC8728

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

Channel-to-channel isolation(8)

VREF = 4VPP, f = 1kHz

DACs in the same group

nV-s

DAC-to-DAC crosstalk(9)

DACs among different groups

nV-s

Digital crosstalk(10)

nV-s

Digital feedthrough(11)

nV-s

TA = +25°C at 10kHz, gain = 6

200

nV/

√Hz

Output noise

TA = +25°C at 10kHz, gain = 4

130

nV/

√Hz

0.1Hz to 10Hz, gain = 6

μVPP

Power-supply rejection(12)

AVDD = +33V to +36V

0.05

LSB

ANALOG MONITOR PIN (VMON)

Output impedance(13)

TA = +25°C

2000

Ω

Three-state leakage current

100

REFERENCE INPUT

Reference input voltage

1.0

5.5

range(14)

Reference input dc impedance

Ω

Reference input capacitance

DIGITAL INPUT(15)

IOVDD = +4.5V to +5.5V

3.8

0.3 + IOVDD

High-level input voltage, VIH

IOVDD = +2.7V to +3.3V

2.3

0.3 + IOVDD

IOVDD = +1.7V to 2.0V

1.5

0.3 + IOVDD

IOVDD = +4.5V to +5.5V

–0.3

0.8

Low-level input voltage, VIL

IOVDD = +2.7V to +3.3V

–0.3

0.6

IOVDD = +1.7V to 2.0V

–0.3

0.3

CLR, LDAC, RST, A0 to A4, R/W, and CS

±1

μA

Input current

USB/BTC, RSTSEL, and D0 to D15, and GPIO

±5

μA

CLR, LDAC, RST, A0 to A4, R/W, and CS

Input capacitance

USB/BTC, RSTSEL, and D0 to D15

GPIO

DIGITAL OUTPUT(15)

IOVDD = +2.7V to +5.5V, sourcing 1mA

IOVDD – 0.4

IOVDD

High-level output voltage, VOH

(D0 to D15)

IOVDD = +1.8V, sourcing 200μA

1.6

IOVDD

IOVDD = +2.7V to +5.5V, sinking 1mA

0.4

Low-level output voltage, VOL

(D0 to D15, BUSY, and GPIO)

IOVDD = +1.8V, sinking 200μA

0.2

High-impedance leakage current D0 to D13, BUSY, and GPIO

±5

μA

High-impedance output

BUSY and GPIO

capacitance

(8)

Channel-to-channel isolation refers to the ratio of the signal amplitude at the output of one DAC channel to the amplitude of the

sinusoidal signal on the reference input of another DAC channel. It is expressed in dB and measured at midscale.

(9)

DAC-to-DAC crosstalk is the glitch impulse that appears at the output of one DAC as a result of both the full-scale digital code and

subsequent analog output change at another DAC. It is measured with LDAC tied low and expressed in nV-s.

(10) Digital crosstalk is the glitch impulse transferred to the output of one converter as a result of a full-scale code change in the DAC input

(11) Digital feedthrough is the glitch impulse injected to the output of a DAC as a result of a digital code change in the DAC input register of

the same DAC. It is measured with the full-scale digital code change without updating the DAC output, and is expressed in nV-s.

(12) The analog output must not be greater than (AVDD – 0.5V).

(13) 8000

Ω when VMON is connected to Reference Buffer A or B.

(14) Reference input voltage

≤ DVDD.

(15) Specified by design.

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