IR3521

Page 22

V3.03

Over-Current Hiccup Protection after Soft Start

the hiccup over-current protection with delay after PGOOD is asserted. The delay is required since over-current

conditions can occur as part of normal operation due to load transients or VID transitions.

120mV offset of the delay comparator, the fault latch will be set which will then pull the error amplifier’s output low to

stop phase IC switching and will also de-asserting the PGOOD signal. The SS/DEL capacitor will then continue to

be discharged by a 4.5 uA current until it reaches 200 mV where the fault latch will reset to allow another soft start

cycle to occur. The output current is not controlled during the delay time. If an over-current condition is again

encountered during the soft start cycle, the over-current action will repeat and the converter will be in hiccup mode.

OVER-CURRENT

PROTECTION

(OUTPUT SHORTED)

3.87V

NORMAL

OPERATION

EA

OCP

DELAY

POWER-DOWN

HICCUP OVER-CURRENT

PROTECTION (OUTPUT

SHORTED)

PGOOD

3.92V

SS/DEL

NORMAL

OPERATION

START-UP WITH

OUTPUT SHORTED

OCP THRESHOLD

ENABLE

1.4V

IOUT

VOUT

NORMAL

START-UP

4.0V

(OUTPUT

SHORTED)

NORMAL

START-UP

INTERNAL

OC DELAY

Figure 13 Hiccup over-current waveforms

Linear Regulator Output (VCCL)

The IR3521 has a built-in linear regulator controller, and only an external NPN transistor is needed to create a

linear regulator. The output voltage of the linear regulator can be programmed between 4.75V and 7.5V [?] by the

resistor divider at VCCLFB pin. The regulator output powers the gate drivers and other circuits of the phase ICs

along with circuits in the control IC, and the voltage is usually programmed to optimize the converter efficiency. The

linear regulator can be compensated by a 4.7uF capacitor at the VCCL pin. As with any linear regulator, due to

stability reasons, there is an upper limit to the maximum value of capacitor that can be used at this pin and it’s a

function of the number of phases used in the multiphase architecture and their switching frequency. Figure 14

shows the stability plots for the linear regulator with 5 phases switching at 750 kHz.

For powering the IR3521 and up to two phase ICs an NPN transistor in a SOT-23 package could be used. For a

larger number of phase ICs an NPN transistor in DPAK package is recommended. .

VCCL voltage must be regulated by a closed control loop based on the IR3521’s VCCL regulator controller in order

to keep both VCCLDRV and VCCLFB voltages in the operating points that would support correct UVLO operation.

No external power rail can be connected to VCCL pin.”