IR3521 datasheet(24/45 Pages) IRF

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IR3521

Page 24

V3.03

Open Voltage Loop Detection

The output voltage range of error amplifier is continuously monitored to ensure the voltage loop is in regulation. If

any fault condition forces the error amplifier output above VCCL-1.08V for 8 PHSOUT switching cycles, the fault

latch is set. The fault latch can only be cleared by cycling the power to VCCL.

Load Current Indicator Output

The VDRP pin voltage represents the average current of the converter plus the DAC voltage. The load current

information can be retrieved by using a differential amplifier to subtract VDAC1 voltage from the VDRP1 voltage.

Enable Input

Pulling the ENABLE pin below 0.8V sets the Fault Latch. Forcing ENABLE to a voltage above 1.94V results in the

pre-PWROK 2 bit VID codes off the SVD and SVC pins to be read and stored. SS/DELX pins are also allowed to

begin their power-up cycles.

Over Voltage Protection (OVP)

Output over-voltage might occur due to a high side MOSFET short or if the output voltage sense path is

compromised. If the over-voltage protection comparators sense that either VOUTX pin voltage exceeds VDACX by

260mV, the over voltage fault latch is set which pulls the error amplifier output low to turn off the converter power

stage. The IR3521 communicates an OVP condition to the system by raising the ROSC/OVP pin voltage to within

V(VCCL) – 1.2 V. An OVP condition is also communicated to the phase ICs by forcing the IIN pin (which is tied to

the ISHARE bus and ISHARE pins of the phase ICs) to VCCL as shown in Figure 15. In each phase IC, the OVP

circuit overrides the normal PWM operation to ensure the low side MOSFET turn-on within approximately 150ns.

The low side MOSFET will remain on until the ISHARE pins fall below V(VCCL) - 800mV. An over voltage fault

condition is latched in the IR3521 and can only be cleared by cycling the power to VCCL.

During dynamic VID down at light to no load, false OVP triggering is prevented by increasing the OVP threshold to a

fixed 1.85V whenever a dynamic VID is detected and the difference between output voltage and the fast internal

VDAC is more than 50mV, as shown in Figure 16. The over-voltage threshold is changed back to VDAC+125mV if

the difference between output voltage and the fast internal VDAC is less than 50mV.

The overall system must be considered when designing for OVP. In many cases the over-current protection of the

AC-DC or DC-DC converter supplying the multiphase converter will be triggered thus providing effective protection

without damage as long as all PCB traces and components are sized to handle the worst-case maximum current. If

this is not possible, a fuse can be added in the input supply to the multiphase converter.

IR3521 Datasheet(PDF) 24 Page - International Rectifier