IR3521 datasheet(28/45 Pages) IRF

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IR3521

Page 28

V3.03

DESIGN PROCEDURES - IR3521 AND IR3508 CHIPSET

IR3521 EXTERNAL COMPONENTS

All the output components are selected using one output but suitable for both unless otherwise specified.

Oscillator Resistor RRosc

The IR3521 generates square wave pulses to synchronize the phase ICs. The switching frequency of the each

phase converter equals the PHSOUT frequency, which is set by the external resistor RROSC (use Figure 2 to

determine the RROSC value). The CLKOUT frequency equals the switching frequency multiplied by the phase

number.

Soft Start Capacitor CSS/DEL

The Soft Start capacitor CSS/DEL programs four different time parameters: soft start delay time, soft start time,

PGOOD delay time and over-current fault latch delay time after PGOOD.

SS/DEL pin voltage controls the slew rate of the converter output voltage, as shown in Figure 11. Once the ENABLE

pin rises above 1.65V, there is a soft-start delay time TD1 during which SS/DEL pin is charged from zero to 1.4V.

Once SS/DEL reaches 1.4V the error amplifier output is released to allow the soft start. The soft start time, TD2,

represents the time during which converter voltage rises from zero to pre-PWROK VID voltage and the SS/DEL pin

voltage rises from 1.4V to pre-PWROK VID voltage plus 1.4V. PGOOD delay time TD3 is the time period from VR

reaching the pre-PWROK VID voltage to the PGOOD signal assertion.

Calculate CSS/DEL based on the required soft start time TD2.

PWROK

pre

PWROK

pre

CHG

DEL





(1)

The soft start delay time TD1 and PGOOD delay time TD3 are determined by equation (2) and (3) respectively.





DEL

CHG

DEL

(2)

)

(

)

(









PWROK

pre

DEL

CHG

PWROK

pre

DEL

(3)

Once CSS/DEL is chosen, use equation (4) to calculate the maximum over-current fault latch delay time

tOCDEL.





DEL

DISCHG

DEL

OCDEL

(4)

VDAC Slew Rate Programming Capacitor CVDAC and Resistor RVDAC

The slew rate of VDAC down-slope SRDOWN can be programmed by the external capacitor CVDAC as defined in (5),

where ISINK is the VDAC buffer sink current. The resistor RVDAC is used to compensate VDAC circuit and is

determined by (6). The up and down slow are equal due to symmetrical sink and source capabilities of the VDAC

buffer.

IR3521 Datasheet(PDF) 28 Page - International Rectifier

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