IR3521 datasheet(10/45 Pages) IRF

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IR3521

Page 10

V3.03

SYSTEM SET POINT TEST

The converter output voltage is determined by the system set point voltage which is the voltage that appears at

the FBx pins when the converter is in regulation. The set point voltage includes error terms for the VDAC digital-

to-analog converters, Error Amp input offsets, and Remote Sense input offsets. The voltage appearing at the

VDACx pins is not the system set point voltage. System set point voltage test circuits for Outputs 1 and 2 are

shown in Figures 3A and 3B.

CVDAC1

RROSC

RVDAC1

ROCSET1

EAOUT1

FB1

OCSET1

VDAC1

VOSEN1-

VOSEN1+

VOUT1

LGND

ROSC

IROSC

EAOUT

VOSNS-

VDAC1

BUFFER

AMPLIFIER

IFB1

ROSC BUFFER

AMPLIFIER

1.2V

"FAST"

VDAC

ISINK

ISOURCE

IR3521

SYSTEM

SET POINT

VOLTAGE

IOCSET1

CURRENT

SOURCE

GENERATOR

REMOTE SENSE

AMPLIFIER

ERROR

AMPLIFIER

IROSC

Figure 3A - Output 1 System Set Point Test Circuit

CVDAC2

RROSC

RVDAC2

ROCSET2

VDAC2

OCSET2

FB2

EAOUT2

LGND

VOUT2

VOSEN2+

VOSEN2-

IROSC

ROSC

VOSNS-

EAOUT

VDAC2

BUFFER

AMPLIFIER

"FAST"

VDAC

1.2V

ROSC BUFFER

AMPLIFIER

SYSTEM

SET POINT

VOLTAGE

IR3521

ISOURCE

ISINK

IROSC

ERROR

AMPLIFIER

REMOTE SENSE

AMPLIFIER

CURRENT

SOURCE

GENERATOR

IOCSET2

Figure 3B - Output 2 System Set Point Test Circuit

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