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DLPC200 Datasheet(PDF) 36 Page - Texas Instruments

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Part # DLPC200
Description  DLP짰 Digital Controller for the DLP5500 DMD
PDF  41 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DLPC200 Datasheet(HTML) 36 Page - Texas Instruments

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DLPC200
DLPS014A – APRIL 2010 – REVISED MAY 2010
www.ti.com
POWER UP REQUIREMENTS
Details about the chip power up requirements are included in the DLPZ004 Chipset datasheet. For the DLPC200,
there is a 50 MHz reference clock that must meet the specifications listed in the table below. Additionally, at
power up, the 3.3 V supply must be stable for 2 seconds before the global reset (RESET) occurs and then
PWR_GOOD occurs within 20 msec.
Table 2. Reference Clock Oscillator Requirements
PART NUMBER
FREQUENCY STABILITY
FREQUENCY
SUPPLY VOLTAGE
ASV-50.000MHZ-E-J-T
±20 ppm (0.002% or ±0.001 MHz)
50 MHz
3.3 V
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
CONDITIONS
VALUE
UNIT
VCC12
–0.5 V to 1.80
VCCIO18
–0.5 V to 3.90
Supply voltage range (2)
V
VCCA25_DPLL
–0.5 V to 3.75
VCCD_PLL1-4
-0.5 V to 1.80
VI
Input voltage range(3)
1.8 V, 2.5 V, 3.3 V
–0.5 V to 3.95
V
TJ
Operating junction temperature range
–40°C to 125
°C
Tstg
Storage temperature range
–65°C to 150
°C
HBM
Electrostatic discharge voltage using the Human
± 2000
V
Body Model
CD
Electrostatic discharge voltage using the Charged
± 500
V
Device Model
(1)
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltage values are with respect to GND, and at the device not at the power supply.
(3)
Applies to external input and bidirectional buffers.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
CONDITIONS
MIN
NOM
MAX
UNIT
VCC12
1.2-V supply voltage, core logic
1.15
1.2
1.25
V
VCC18
1.5-V supply voltage, HSTL output
1.71
1.8
1.89
V
buffers
VCCA25_DPLL
2.5-V analog voltage for PLL regulator
2.375
2.5
2.625
V
VCCD_PLL1-4
1.2-V supply voltage, for PLL
1.15
1.2
1.25
V
VI
Input voltage
–0.5
3.6
V
VO
Output voltage
0
VCCIO
V
tRamp
Power supply ramp time
50 us
3 ms
-
TJ
Operating junction temperature(1)
0
70
°C
RC
Case-to-ambient thermal resistance
TA = ambient
[ (TJ – TA) / P ] - 3.3
temperature
°C/W
P = Power
(1)
Heat sink not required for 0 to 55, but for 55 to 70, low profile (15 mm) heat sink recommended
Thermal Considerations
The underlying thermal limitation for the DLPC200 is that the maximum operating junction temperature (TJ) not
be exceeded (see Recommended Operating Conditions). This temperature is dependent on operating ambient
temperature, airflow, PCB design (including the component layout density and the amount of copper used),
power dissipation of the DLPC200 and power dissipation of surrounding components. The DLPC200’s package
is designed primarily to extract heat through the power and ground planes of the PCB, thus copper content and
airflow over the PCB are important factors.
36
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): DLPC200



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