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DLPC200 Datasheet(PDF) 26 Page - Texas Instruments

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Part # DLPC200
Description  DLP짰 Digital Controller for the DLP5500 DMD
PDF  41 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DLPC200 Datasheet(HTML) 26 Page - Texas Instruments

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USB_CLK
USB_PA04
USB_RDY1
USB_PA02
USB_FDC[15..0]
Data_In
tCL
tAV
tON1
tSTBH
tOFF1
tSTBL
tSCSL
DLPC200
DLPS014A – APRIL 2010 – REVISED MAY 2010
www.ti.com
USB WRITE INTERFACE TIMING REQUIREMENTS
MIN
MAX
UNIT
tAV
Delay from clock to valid address
0
10.7
ns
tSTBL
Clock to USB_RDY1 pulse LOW
0
11.2
ns
tSTBH
Clock to USB_RDY1 pulse HIGH
0
11.2
ns
tSCSL
Clock to USB_PA02 pulse LOW
13.0
ns
tON1
Clock to data turn-on
0
13.1
ns
tOFF1
Clock to data hold time
0
13.1
ns
Figure 7. USB Write Timing
Recommended USB Devices
PART NUMBER
MANUFACTURER
CY7C68013A
Cypress
SPI Slave Interface
The DLCP200 controller SPI interface consists of a 5 MHz input.
The SPI bus specifies five logic signals.
•
SCLK — Serial Clock (output from master)
•
MOSI — Master Output, Slave Input (output from master)
•
MISO — Master Input, Slave Output (output from slave)
•
SS — Slave Select (active low; output from master)
•
BUSY — hold off signal to indicate that the slave is processing commands and cannot accept new input
26
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): DLPC200



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