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Intel® 6400/6402 Advanced Memory Buffer Datasheet

10.2.4

Error Reporting

By default the status pins will be the xor of actual data from the DRAM and expected

data from the tester. The AMB also stores 144 bits of DQ data. If the LGFBITS control

bit is cleared the 144 bits of data will be actual data read from the DRAM. Otherwise

the result of the data compare is stored. In either case the tester must still provide

expected data for the AMB to properly set the status pins.

Normally the test will stop when an error occurs. It is the responsibility of the tester or

test program to track errors, read error registers and stop or continue as appropriate.

This may require multiple iterations of the same test to execute, collect data and re-

start the test.

10.2.4.1

Multiple Failures

There are some implications if multiple failures occur in the same DRAM burst. Three

control register bits determine how these failures should be captured. If the log first fail

(lgffail) bit is zero (default) the AMB will record only the last failure in a burst. When

the bit is set the AMB will record the first failure at the burst position matching the

burst position (bstpos) setting. If the bit is set and an error is logged, no further

logging will occur until the bit is cleared.

a) If a failure is detected only in one half of the burst (first and second or third and

fourth data words), the error pins will indicate which DRAM or DRAMs failed. The error

b) If a failure is detected in both halves of the burst (data word 1 or 2 and words 3 or

4), data from the second failure would overwrite data from the first failure. By default

this is prevented by the log fail bit. The error pins will continue to operate correctly. If it

is desired to collect data from a specific portion of the burst the burst position bits can

be used to select an appropriate burst position to record. For a 4 bit burst it is possible

to select data from the first or second half of the burst. For an 8 bit burst there are four

positions to choose from. These mappings are illustrated in the following figure.

* The last failure will be saved in whatever burst position it occurs.

Table 10-3. Mapping of Burst Position Bits to Error Capture

Log First Fail

Burst Position

BL=4

Bit0

Bit1

Bit0

1234

144 bits*

or 144 bits*

144 bits

Log First Fail

Burst Position

BL=8

Bit0

Bit1

Bit0

12345

144 bits*

or 144 bits*

144 bits

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