6402 datasheet(142/250 Pages) INTEL

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6402 Datasheet(PDF) 142 Page - Intel Corporation

142 / 250 page

DDR MemBIST

142

Intel® 6400/6402 Advanced Memory Buffer Datasheet

11.5.3.1

MemBIST CSFSM

This FSM creates DRAM commands for MemBIST.

• When read or write command is available and tRP/tRC timing are met, MemBIST

CSFSM will transit out of IDLE state to ACT state.

• In ACT state, FSM will wait for tRCD timing parameter qualified and go to RDWT

state.

• If the next coming read or write command is in same page and DRAM timing is

qualified, FSM will be looping in this state. If the next command is not in the same

page or there is an auto-refresh/self-refresh request, FSM will go to PRECHARGE

state.

• In PRECHARGE state, FSM always go back to IDLE state.

• In IDLE state, if there is a self refresh or an auto refresh request, FSM will wait for

self refresh logic accept signal or auto refresh accept signal.

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