6402 datasheet(139/250 Pages) INTEL

139 / 250 page

Intel® 6400/6402 Advanced Memory Buffer Datasheet

139

DDR MemBIST

11.5.2

MB Flow Control State Machine

This FSM controls the MemBIST flow and generates read/write commands for

MemBIST.

• When MBCSR bit[31] is programmed to begin execution, the MemBIST FSM will

transition out of the IDLE state to either WR_START or RD_START, depending upon

the MemBIST command programmed in MBCSR:cmd.

• In WR_START state, FSM will look at the decoding of DATA type selection. If LFSR

data type generation is selected, FSM will go to WR_SEED state. If not, FSM will

directly go to WR_NXTAD state.

Figure 11-7. MBFSM Diagram

Mem B ist MB FSM

cget & lastaddr

IDLE

WR_START

mbstart &

(wronly |

wrrdcm p)

~ lfsrdata

core_rst_l =0

W R_NXTAD

W R_AVAIL

Always

WR_W AIT

WR_DO NE

RD_START

~wronly

writeidle

wronly

lfsrdata

lfsrseed_done

RD_NX TAD

RD_AVAIL

Always

W R_SEED

m bs

tart

(rdo

nly |

rdcm

RD_W AIT

RD_DO NE

RD_S EED

lfsrdata

lfsrseed_done

RD_W RAVL

RD_NXTW R

cget & rd2wr

Always

cget & lastaddr & ~rdw2wr

rdidle & ~rd2wr

wridle & rd2wr

cget &

lastaddr &

rd2wr

cget &

~lastaddr &

~rd2wr

~ lfsrdata

Always

cget & ~lastaddr

cget &

~lastaddr &

rd2wr

6402 Datasheet(PDF) 139 Page - Intel Corporation

6402 Datasheet(HTML) 139 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL