6402 datasheet(136/250 Pages) INTEL

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DDR MemBIST

136

Intel® 6400/6402 Advanced Memory Buffer Datasheet

11.4.4

Write 144-bit User-defined Pattern to a Range of

Addresses and Check

This describes writing user-defined data to a range of DRAM addresses and checking

this data.

1. Set up registers for normal DRAM operation.

2. Program MB_START_ADDR and MB_END_ADDR registers to the desired address

range to be tested.

3. 144 bits of user-defined data is written to MBDATA[9, 7:4]. MBDATA[8, 3:0] and

MBLFSRSED are unused and are therefore not written.

4. Program MBCSR.

These fields are required for the specified test:

— Program DTYPE (bits [9:8]) to 01 to select user-defined data.

— ENABLE288 (bit 15) is left 0 to select 144 bit user-defined data.

— Program CMD (bits [5:4]) to be 11 (write followed by read with data

comparison).

— Program ATYPE (bits [7:6]) to 10 to use the address range already defined in

the MB_START_ADDR and MB_END_ADDR registers.

— Select either Rank 0 or Rank 1 by programming CS (bits [21:20]).

— INVERT (bit 19) is unnecessary for user-defined data, as the user can set the

bits to the values desired directly. Set this field to 0.

The values for these fields can be selected to choose options for use during

MemBIST operation:

— Program ABAR (bit 13) to select DAI if desired.

— Program FAST (bits [11:10]) to select Fast X, Fast Y, Fast XY, or XZY (column-

>bank->row) address sequencing.

— Program ADIR (bit 12) to select whether addresses should increment or

decrement.

— MBDATA (bit 14) is set to select failure address logging or failure data bit

location accumulator logging in MBDATA[8, 3:0].

Set these control values to start the MemBIST engine.

— Set ALGO (bits 26:24) to 0 to prevent the algorithm engine from overwriting

bits it controls in MBCSR.

— Set ABORT (bit 28) to 0.

— Clear PF (bit 30). Hardware will set this bit if a failure is detected.

— If desired to halt whenever there is an error, set HALT (bit 29).

— Set START (bit 31) to 1 to start MemBIST execution.

5. Check the MemBIST results, and if a failure occurred, observe failure data or

address through MBDATA registers and MB_ERR_DATA registers:

— Check MBCSR:start. 0 means MemBIST has completed. Check MBCSR:PF. 1

means a failure has occurred.

— Depending upon the value chosen for MBCSR:mbdata, either up to 5 failure

addresses or the failure data bit location accumulator will be stored in

MBDATA[8, 3:0].

— Failure data will be stored in MB_ERR_DATA[3:0][4:0] registers.

6402 Datasheet(PDF) 136 Page - Intel Corporation

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