6402 datasheet(133/250 Pages) INTEL

133 / 250 page

Intel® 6400/6402 Advanced Memory Buffer Datasheet

133

DDR MemBIST

3. No user data is required, as fixed data (selected in MBCSR) will be used for this

test. Therefore, the MBDATA[9:0] and MBLFSRSED registers are not written.

4. Program MBCSR.

These fields are required for the specified test:

— Program DTYPE (bits [9:8]) to 00 to select fixed data pattern.

— Program ATYPE (bits [7:6]) to 10 to use the address range already defined in

the MB_START_ADDR and MB_END_ADDR registers.

— Select either Rank 0 or Rank 1 by programming CS (bits [21:20]).

— MBDATA (bit 14) and ENABLE288 (bit 15) are not relevant when fixed data has

been selected. INVERT (bit 19) is unnecessary for fixed data, since the data

choices include inverses for all fixed data patterns. Rewrite these fields with

their default values.

The values for these fields can be selected to choose options for use during

MemBIST operation:

— Program ABAR (bit 13) to select DAI if desired.

— Either program CMD (bits [5:4]) to be “01” (write only without data

comparison) or “11” (write followed by read with data comparison).

— Program FAST (bits [11:10]) to select Fast X, Fast Y, Fast XY, or XZY

(column->bank->row) address sequencing.

— Program ADIR (bit 12) to select whether addresses should increment or

decrement.

— Program FIXED (bits [18:16]) to specify which fixed data pattern to apply.

Set these control values to start the MemBIST engine.

— Set ALGO (bits 26:24) to 0 to prevent the algorithm engine from overwriting

bits it controls in MBCSR.

— Set ABORT (bit 28) to 0.

— Clear PF (bit 30). Hardware will set this bit if a failure is detected.

— If desired to halt whenever there is an error, set HALT (bit 29).

— Set START (bit 31) to 1 to start MemBIST execution.

5. Check the MemBIST results, and if checking was enabled, observe failure data or

address through MBDATA registers and MB_ERR_DATA registers:

— Check MBCSR:start. 0 means MemBIST has completed. Check MBCSR:PF. 1

means a failure has occurred.

— Failure data bit location accumulator will be stored in MBDATA[8, 3:0].

— Up to 5 failure addresses will be placed in MBDATA[9, 7:4]

— Failure data will be stored in MB_ERR_DATA[3:0][4:0] registers.

11.4.2

Write Random Data to a Range of DRAM Addresses and

Check

This describes writing randomly generated data to a range of DRAM addresses and

checking this data.

1. Set up registers for normal DRAM operation.

2. Program MB_START_ADDR and MB_END_ADDR registers to the desired address

range to be tested.

6402 Datasheet(PDF) 133 Page - Intel Corporation

6402 Datasheet(HTML) 133 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL