R26 datasheet(106/487 Pages) RENESAS

106 / 487 page

R8C/26 Group, R8C/27 Group

10. Clock Generation Circuit

Rev.2.10

Sep 26, 2008

Page 87 of 453

REJ09B0278-0210

Figure 10.9

VCA2 Register (J, K Version)

Voltage Detection Register 2

(1) (J, K Version)

Symbol

Address

After Reset(4)

VCA2

0032h

Bit Symbol

Bit Name

Function

NOTES:

The LVD1ON bit in the OFS register is

set to 1 and hardw are reset

: 00h

Pow er-on reset, voltage monitor 1 reset

or LVD1ON bit in the OFS register is

set to 0, and hardw are reset

: 0100000b

—

(b5-b1)

Reserved bits

Set to 0.

b7 b6 b5 b4 b3 b2 b1 b0

00 000

Voltage detection 2 enable

bit(3)

0 : Voltage detection 2 circuit disabled

1 : Voltage detection 2 circuit enabled

VCA26

Voltage detection 1 enable

bit(2)

0 : Voltage detection 1 circuit disabled

1 : Voltage detection 1 circuit enabled

Use the VCA20 bit only w hen entering to w ait mode. To set the VCA20 bit, follow the procedure show n in Figure

10.10 Procedure for Enabling Reduced Internal Pow er Consum ption Using VCA20 bit.

VCA20

Internal pow er low

consumption enable bit(5)

0 : Disables low consumption

1 : Enables low consumption

Set the PRC3 bit in the PRCR register to 1 (w rite enable) before w riting to the VCA2 register.

To use the voltage monitor 1 reset, set the VCA26 bit to 1.

After the VCA26 bit is set to 1 from 0, the voltage detection circuit w aits for td(E-A) to elapse before starting

operation.

To use the voltage monitor 2 interrupt/reset or the VCA13 bit in the VCA1 register, set the VCA27 bit to 1.

After the VCA27 bit is set to 1 from 0, the voltage detection circuit w aits for td(E-A) to elapse before starting

operation.

Softw are reset, w atchdog timer reset, or voltage monitor 2 reset do not affect this register.

VCA27

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